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You also agree that your personal information may be transferred and processed in the United States, and that you have read and agree to the Terms of Use and the Privacy Policy. Google is the latest of the tech giants hiring Wall Street hotshots. The CIO lesson? Partner with your CFO if you want to get ahead. Also in Searchlight: Facebook turns Messenger into an ecosystem; Twitter faces a gender bias lawsuit. The PCI Security Standards Council has confirmed that PCI DSS 3.1 will be released in just a few weeks. PCI DSS 3.1 will be released in just a few weeks. The card scheme is predictable and itemized, but the new rules deal with mobile transactions and EMV. The story (free registration required) explains how the PCI Security Standards Council has confirmed that PCI DSS 3.1 will be released in just a few weeks. The scheme is predictable and itemized, but the new rules deal with mobile transactions and EMV. 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The gate electrode of a semiconductor device is formed by filling a gate-electrode material into the isolation trenches, and is formed such that a portion of the gate-electrode material is exposed from the isolation trenches. To remove a portion of the gate-electrode material which is exposed from the isolation trenches, a CMP (Chemical Mechanical Polishing) process is performed after the gate electrode is formed. In general, a CMP process may be implemented in the form of a single-wafer CMP process or a multi-wafer CMP process. In a single-wafer CMP process, the wafer as a single item is ground by a polishing pad. In a multi-wafer CMP process, a group of wafers is held by a wafer holder, and the wafer holder is brought into contact with the polishing pad to perform CMP. In the multi-wafer CMP process, a polishing liquid is supplied to the polishing pad, and the wafer holder is rotated to mechanically press the wafer against the polishing pad. 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